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학술지 Low-Voltage-Operated Top-Gate Polymer Thin-Film Transistors with high Capacitance Poly(Vinylidene Fluoride-Trifluoroethylene)/Poly(Methyl Methacrylate) Dielectrics
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저자
정순원, 백강준, Sung-Min Yoon, 유인규, 이종근, 김영순, 노용영
발행일
201011
출처
Journal of Applied Physics, v.108 no.10
ISSN
0021-8979
출판사
American Institute of Physics(AIP)
DOI
https://dx.doi.org/10.1063/1.3511697
협약과제
09IC1900, 개별물품 단위 응용을 위한 차세대 RFID 기술 개발, 채종석
초록
We report on low-voltage-operated polymer transistors with poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)]/poly(methyl methacrylate) (PMMA) blended films as a gate dielectric layer. Top-gate polymer transistors are fabricated by all-solution processes on poly(9,9-dioctylfuorene-co-bithiophene) (F8T2) as an active layer. Both the operating voltage and charge carrier mobility are improved using P(VDF-TrFE)/PMMA blended films as a dielectric layer and by optimization of the ratio of the composite. F8T2 transistors have a high field-effect mobility of 1× 10-2 cm2 /V s and a low operation gate voltage of less than 10 V. The operation voltage effectively decreases owing to the high permittivity of the P(VDF-TrFE)]/(PMMA) blended film (10.4-8.4). The hysteresis induced by the ferroelectric polymer effectively disappears with the addition of a small amount of amorphous PMMA (5 wt %). © 2010 American Institute of Physics.