BROWSE
Detail
Conference Paper
Normally-off GaN MIS-HEMT Using CF4 Plasma Gate Recess
Cited - time in 
Share 
Share
- Authors
- Youngrak Park, Jungjin Kim, Wooyoung Jang, Woojin Chang, Hyungyu Jang, Jeho Na, Hyunsoo Lee, Jaekyung Mun, Eunsoo Nam, Sangchoon Ko
- Issue Date
- 2014-08
- Citation
- International Workshop on Nitride Semiconductors (IWN) 2014, pp.1-2
- Language
- English
- Type
- Conference Paper
- Abstract
- GaN-based devices are attractive candidates for high-power applications such as power switching devices. Especially, enhancement-mode or normally-off FETs are desirable in these applications. Several methods have been developed to implement normally-off FET, including recessed-gate, fluoride plasma treatment, and p-type GaN. We demonstrate the normally-off device using a combination of recessed-gate and CF4 plasma treatment.The wafer consisted of a 1.25 nm thick undoped-GaN capping layer, a 20 nm thick undoped-AlGaN barrier, a 3 µm thick undoped-GaN buffer on high resistivity Si substrate. The proposed FET structure is shown in Fig 1 . The mesa isolation region was removed by mixed BCl3+Cl2 gas plasma dry etching in ICP-RIE chamber. In order to achieve normally off FETs, the gate region was etched by CF4 based RIE plasma treatment for 10 min first, followed by Cl2 based ICP-RIE plasma dry etching with 180 Å thick (Sample A). Another method was realized in reverse order, ICP-RIE first, then RIE plasma treatment (Sample B). The high quality of Al2O3 was deposited by Atomic layer deposition (ALD) for gate oxide. Ti/Al based metal stacks were deposited, followed by annealing in a N2 ambient at 870°C for 30s to form ohmic contacts. The gate metal was achieved by Ni/Au (30/300 nm) metal stack.From the AFM measurement, final thicknesses of gate-recessed region in Sample A and B are 210 and 218 Å, respectively. It should be noted that the gate region was slightly etched about 30 Å more due to CF4 plasma treatment, compared to that of sample C, which was only etched by Cl2 ICP dry etcher with thickness of 180 Å. Table 1 shows the brief results of the fabricated devices. The IDS-VGS characteristics of small device (W=100 µm) and Large device (W=12 mm) are shown in Fig 2 . We first bias Vg from +10 V to -10 V and then back to +10 V. All of the gate-recessed samples have experienced a hysteresis in log scaled ID curve, but samples with CF4 plasma treatment have severer hysteresis phenomena. The devices with recessed gate well demonstrated normally-off operation. As shown in Fig 3, the threshold voltage of sample A, B, C are 2.8, 3.7, 0.6 V, respectively. The estimated subthreshold Slope of sample A, B, C were 0.105, 0.124, 0.07 V/decade. We also confirm that regardless of the size of FETs, we obtained similar results.Based on the results mentioned above, the damage of CF4 plasma gas was introduced [1] and F -ions incorporation in the AlGaN layer was indirectly confirmed by Vth shift curve [2]. We are still studying on the exact mechanism of these phenomena including material analysis such as Secondary Ion Mass Spectrometry (SIMS). But, we believe that CF4 plasma treatment can slightly etch AlGaN/GaN and introduce plasma damage and fluorine ions.
- KSP Keywords
- 2 mm, 20 nm, 5 nm, AFM measurements, Atomic Layer Deposition, Capping layer, Enhancement mode(E-mode), Fluoride plasma treatment, Fluorine ions, GaN MIS-HEMT, GaN buffer