ETRI-Knowledge Sharing Plaform

KOREAN
논문 검색
Type SCI
Year ~ Keyword

Detail

Journal Article Fabrication of Self-Aligned TFTs with a Ultra-Low Temperature Polycrystalline Silicon Process on Metal Foils
Cited 2 time in scopus Download 0 time Share share facebook twitter linkedin kakaostory
Authors
Jaehyun Moon, Yong-Hae Kim, Dong-Jin Park, Choong-Heui Chung, Seung-Youl Kang, Jin-Ho Lee
Issue Date
2010-11
Citation
Solid-State Electronics, v.54, no.11, pp.1326-1331
ISSN
0038-1101
Publisher
Elsevier
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1016/j.sse.2010.05.021
Project Code
07MB1600, Flexible Display, Cho Kyoung Ik
Abstract
We have fabricated self-aligned thin-film transistors (TFTs) using a ultra-low temperature (T < 200 °C) polycrystalline silicon process on stainless steel foil substrates. The overall processing scheme and technical details were discussed from the viewpoint of electrical and mechanical stabilities. Large grain poly-Si films were obtained with sequential lateral solidification (SLS) method. Plasma enhanced atomic layer deposition (PEALD) method was used to form Al2O3 gate dielectric films. The TFT performances were enhanced by plasma oxidation of the polycrystalline Si surface prior to Al2O3 gate dielectric film deposition. The fabricated TFT showed a field effect mobility of 95 cm2/Vs, a threshold voltage of -3 V and a sub-threshold swing of 0.45 V/dec. © 2010 Elsevier Ltd. All rights reserved.
KSP Keywords
3 V, Gate dielectric film, Large grain, Low temperature(LT), Low-temperature polycrystalline Silicon(LTPS), Metal foil, Plasma-enhanced atomic layer deposition, Polycrystalline silicon(poly-Si), Sequential lateral solidification, Si film, Si surface