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Power Noise Isolation in a Silicon Interposer with Through Silicon Vias
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- Authors
- Myunghoi Kim, Dong-Hwan Shin, Man-Seok Um, In-Bok Yom
- Issue Date
- 2014-12
- Citation
- Electronics Packaging Technology Conference (EPTC) 2014, pp.805-808
- Publisher
- IEEE
- Language
- English
- Type
- Conference Paper
- Abstract
- In this paper, we present a new structure of a power distribution network (PDN) in silicon interposers with through silicon vias (TSVs) to suppress the high-frequency power/ground noise including simultaneous switching noise. The proposed PDN structure employs the resonant structure consisting of metal patterns and TSVs. To examine the effect of design parameters of the resonant structure on noise suppression characteristics, we present Bloch analysis based on a phase of Bloch impedance and Floquet's theorem. Simulation results show a good correlation between Bloch analysis and a full-wave simulation. Power noise isolation of the proposed PDN structure is verified using full-wave simulations.
- KSP Keywords
- Distribution network(DN), Full-wave simulation, High Frequency(HF), Metal pattern, Power distribution network, Power noise, Resonant structure, Simultaneous switching noise, Through silicon vias(TSV), design parameters, noise isolation