상세정보
학술대회
Fault Detection and Isolation of Multiple Defects in Through Silicon Via (TSV) Channel
- 발행일
- 201412
- 출처
- International 3D Systems Integration Conference (3DIC) 2014, pp.1-5
- 초록
- Through silicon via (TSV) based 3D-IC is the key technology to satisfy the continuously growing demand on lower power consumption, higher system bandwidth and smaller form factor of electronic devices. As the I/O count increases up to the order of tens of thousands for high speed data transmission, TSV diameter and interconnection pitch are reduced, which may cause various defects throughout the channel. In this paper, we present a fault detection and isolation method for multiple defects in TSV channel by analyzing the electrical characteristics in frequency- and time-domain. In TSV channels with 5-layer stacked dies, open and short defects are intentionally inserted in different locations and the electrical characteristics are analyzed by 3D FEM solver simulation. The type of defects can be distinguished by S21 magnitude; by comparing S11 and S22 magnitude curves, the location of defects can be localized.
- KSP 제안 키워드
- 3D FEM, 3D IC, Data transmission, Different locations, Form factor, High speed data, Isolation method, Key technology, Lower power, Multiple defects, Power Consumption