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Journal Article Cost Effective Silica-Based 100 G DP-QPSK Coherent Receiver
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Authors
Seo-Young Lee, Young-Tak Han, Jong-Hoi Kim, Hyun-Do Joung, Joong-Seon Choe, Chun-Ju Youn, Young-Ho Ko, Yong-Hwan Kwon
Issue Date
2016-10
Citation
ETRI Journal, v.38, no.5, pp.981-987
ISSN
1225-6463
Publisher
한국전자통신연구원 (ETRI)
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.4218/etrij.16.0015.0014
Abstract
We present a cost-effective dual polarization quadrature phase-shift coherent receiver module using a silica planar lightwave circuit (PLC) hybrid assembly. Two polarization beam splitters and two 90? optical hybrids are monolithically integrated in one silica PLC chip with an index contrast of 2%-??. Two four-channel spot-size converter integrated waveguide-photodetector (PD) arrays are bonded on PD carriers for transverse-electric/ transverse-magnetic polarization, and butt-coupled to a polished facet of the PLC using a simple chip-To-chip bonding method. Instead of a ceramic sub-mount, a lowcost printed circuit board is applied in the module. A stepped CuW block is used to dissipate the heat generated from trans-impedance amplifiers and to vertically align RF transmission lines. The fabricated coherent receiver shows a 3-dB bandwidth of 26 GHz and a common mode rejection ratio of 16 dB at 22 GHz for a local oscillator optical input. A bit error rate of 8.3 × 10-11 is achieved at a 112-Gbps back-To-back transmission with off-line digital signal processing.
KSP Keywords
100 G, 3-dB bandwidth, 6 GHz, Back to Back(BTB), Bit Error rate, Coherent receiver, Common Mode Rejection Ratio, DP-QPSK, Digital Signal Processing, Dual-polarization, Four-Channel