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Conference Paper
Hardware Design Exploration of Fully-Connected Deep Neural Network with Binary Parameters
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- Authors
- Jinkyu Kim, Juyeob Kim, Byungjo Kim, Miyoung Lee, Joohyun Lee
- Issue Date
- 2016-10
- Citation
- International SoC Design Conference (ISOCC) 2016, pp.312-313
- Publisher
- IEEE
- Language
- English
- Type
- Conference Paper
- Abstract
- This paper describes the exploration and analysis to design hardware of the fully connected deep neural network with binary weight value. The fully connected deep neural network is a promising reference model in order to implement fully hardwired classifier in mobile and IoT (Internet of Things) device. So, we analyzed its learning accuracy according to the number of layers and nodes through environment of reference simulation. And we analyzed hardware complexity and usage in terms of FPGA. We used Caffe framework to extract parameter and accuracy as reference model. We used Xilinx Vivado 2015.2 as synthesis tool for hardware design exploration.
- KSP Keywords
- Binary weight, Caffe framework, Deep neural network(DNN), Design Exploration, Fully-connected, Hardware Design, Hardware complexity, Internet of thing(IoT), Number of layers, Reference Model, Xilinx Vivado 2015