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학술대회 Hardware Design Exploration of Fully-Connected Deep Neural Network with Binary Parameters
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저자
김진규, 김주엽, 김병조, 이미영, 이주현
발행일
201610
출처
International SoC Design Conference (ISOCC) 2016, pp.312-313
DOI
https://dx.doi.org/10.1109/ISOCC.2016.7799799
협약과제
16HB1100, 신경모사 인지형 모바일 컴퓨팅 지능형반도체 기술개발, 이주현
초록
This paper describes the exploration and analysis to design hardware of the fully connected deep neural network with binary weight value. The fully connected deep neural network is a promising reference model in order to implement fully hardwired classifier in mobile and IoT (Internet of Things) device. So, we analyzed its learning accuracy according to the number of layers and nodes through environment of reference simulation. And we analyzed hardware complexity and usage in terms of FPGA. We used Caffe framework to extract parameter and accuracy as reference model. We used Xilinx Vivado 2015.2 as synthesis tool for hardware design exploration.
KSP 제안 키워드
Binary weight, Caffe framework, Deep neural network(DNN), Design Exploration, Fully-connected, Hardware Design, Hardware complexity, Internet of thing(IoT), Number of layers, Reference Model, Xilinx Vivado 2015