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학술대회 Characterization of 3D Stacked High Resistivity Si Interposers with Polymer TSV Liners for 3D RF Module
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저자
최광성, 이학선, 배현철, 엄용성, 이강욱, Takafumi Fukushima, Mitsumasa Koyanagi, 이진호
발행일
201505
출처
Electronic Components and Technology Conference (ECTC) 2015, pp.928-933
DOI
https://dx.doi.org/10.1109/ECTC.2015.7159705
초록
The material designs of the Si interposers are optimized for a 3D RF module. The high resistivity Si wafers are used for the Si interposer fabrication: 1,000 ?됀톍m ~ 10,000 ?됀톍m. To reduce the capacitance and mechanical stress between Cufilled TSV and Si substrate, a polyimide insulation layer is applied as a TSV liner. We designs several types of the transmission line structures and measures their electrical properties. For the 3D interconnection between the Si interposers, fluxing underfill material is developed and used as a pre-applied underfill for the thermocompression bonding process. With these optimizations of materials design of the Si interposers, the microstrip line shows the electrical loss of 0.065 dB/mm at 10 GHz, and the insertion loss of the vertical transition is 0.4 dB at 10 GHz.
KSP 제안 키워드
10 Ghz, 3D interconnection, 3D stacked, Bonding process, Electrical loss, Insulation layer, Microstrip Line, RF module, Si interposer, Si substrate, Si wafer