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Journal Article Fabrication of interface-controlled Josephson junctions using Sr/sub 2/AlTaO/sub 6/ insulating layers
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Authors
Gun Yong Sung, Jun Ho Kim
Issue Date
2001-03
Citation
IEEE Transactions on Applied Superconductivity, v.11, no.1, pp.151-I54
ISSN
1051-8223
Publisher
IEEE
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1109/77.919307
Abstract
We fabricated ramp-edge Josephson junctions with barriers formed by interface treatments instead of epitaxially grown barrier layers. A low-dielectric Sr2AlTaO6(SAT) layer was used as an ion-milling mask as well as an insulating layer for the ramp-edge junctions. An ion-milled YBa2Cu3O7-x (YBCO)-edge surface was not exposed to solvent through all fabrication procedures. The barriers were produced by structural modification at the edge of the YBCO base electrode using high energy ion-beam treatment prior to deposition of the YBCO counter electrode. We investigated the effects of high energy ion-beam treatment, annealing, and counter electrode deposition temperature on the characteristics of the interface-controlled Josephson junctions. The junction parameters such as Tc, Ic, RN were measured and discussed in relation to the barrier layer depending on the process parameters.
KSP Keywords
Deposition temperature, Edge surface, Epitaxially grown, High energy ion, Insulating layer, Ion-milling, Josephson junction, Process Parameters, Ramp-edge, barrier layers, counter electrode