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학술지 Architecture for decoding adaptive Reed-Solomon codes with variable block length
Cited 9 time in scopus Download 2 time Share share facebook twitter linkedin kakaostory
저자
Mook Kyou Song, 김응배, 원희선, 공민한
발행일
200208
출처
IEEE Transactions on Consumer Electronics, v.48 no.3, pp.631-637
ISSN
0098-3063
출판사
IEEE
DOI
https://dx.doi.org/10.1109/TCE.2002.1037052
협약과제
02MR3300, 40GHz 광대역 멀티미디어 무선 서비스(BMWS)기반기술 개발, 김응배
초록
In this paper, an adaptive Reed-Solomon (RS) decoder is designed, which can decode RS codes of any block length n as well as any message length k. This unique feature is favorable for a shortened RS code, since it eliminates the need to insert zeros before decoding the code. Furthermore, the value of error-correcting capability t can be changed at every codeword block. The decoder permits 4-step pipelined processing based on the modified Euclid's algorithm (MEA). Each step has a structure suitable for decoding RS codes with varying block length. A new architecture for the MEA is designed for varying values of t. The operating length of the shift registers shortened by one can be adjusted to be varied according to the different values of t. To maintain the throughput rate with less circuitry, the MEA block uses both the multiplexing and recursive technique and the overclocking technique. The adaptive RS decoder over GF(28) having the error-correcting capability of upto 10 has been designed in VHDL, and successfully synthesized in a FPGA chip.
KSP 제안 키워드
Block length, Correcting capability, Error correcting, Euclid's Algorithm, RS code, RS decoder, Reed Solomon(RS), Reed-solomon codes, Shift Register, Throughput rate, pipelined processing