한국통신학회논문지 B : 네트워크 및 융합 서비스, v.27, no.10C, pp.980-986
ISSN
1226-4717
Publisher
한국통신학회 (KICS)
Language
Korean
Type
Journal Article
Abstract
하나의 클럭원으로 동기 되는 고속의 데이터 통신 시스템에서 , 데이터와 클럭 사이의 다른 라우팅 경로나 , 부품 들의 다른 전달지연시간 또는 외부 잡음에 의한 데이터나 클럭의 불안정한 위상과 같은 여러 이유들로 인해 데이터를 잃어버릴 수 가 있다 . 본 논문에서는 이렇게 잃어버런 데이터를 탐지하고 원래의 데이터로 복원하여 보상 출력하는 기능을 갖는 디지털 회로를 제안하고 구현을 기술한다. 특히 , 이러한 보상회로는 광 분야등과 같이 고속의 데이터 전송을 위한 통신 시스템에서 강한 안정성을 가지며 BER 개선에 상당히 크게 영향을 준다 . 이 회로는 Veri log HDL 로 구현이 되었으며 통신 및 데이터 전송관련 디지털 ASIC 구현에 기본적으로 응용이 가능하다 .
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