여러 내장형 시스템에 탑재되는 암호모듈의 구현에 있어, 공개키 알고리즘을 위한 ECC 연산의 지연시간을 단축시키기 위해 유한체 연산은 하드웨어로 구현되는 경우가 많다. 그 중에서도 역원 연산은 지연시간 및 전력 소모, 또한 회로 면적에 있어 가장 주요한 부분을 차지하기 때문에 보다 효율적으로 구현하는 것이 필요하다. 본 논문에서 우리는 효율적인 역원 연산, 즉 작은 회로의 역원기를 위한 하드웨어의 구조를 제안한다. 실험에서, 우리가 구현한 구조는 기존에 주로 쓰이는 Modified Inverse Algorithm의 구현에 비해 비슷한 지연시간을 가지면서 회로 면적에 있어 큰 감소를 보이며 이는 스마트 카드 뿐 아니라 여러 mobile 내장형 시스템에 광범위하게 쓰일 수 있다.
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