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학술대회 Virtual Prototype Based on Aldebarn CPU Core
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저자
이재진, 김찬, 변경진, 엄낙웅
발행일
201510
출처
International Conference on Very Large Scale Integration (VLSI-SoC) 2015, pp.303-306
DOI
https://dx.doi.org/10.1109/VLSI-SoC.2015.7314434
협약과제
14PS2600, Multi-domain 자동차 전장 구조를 위한 ECU용 SoC 및 임베디드 SW 개발, 엄낙웅
초록
This paper proposes a virtual prototype based on the Aldebaran CPU core developed independently by ETRI. The virtual prototype provides instruction and function profiling functionality for software optimization as well as standard integration emulation interface (SystemC, Verilog, Netlist, etc.) compatibility, and architecture performance analysis for efficient adoption into a system-level design environment.
KSP 제안 키워드
Performance analysis, Software optimization, System-level Design, design environment, virtual prototype