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Efficient Architecture for Exponentiation and Division in GF(2m) Using Irreducible AOP
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- Authors
- Won Ho Lee, Young Jun Heo, Kee Young Yoo
- Issue Date
- 2003-05
- Citation
- International Conference on Computational Science and Its Applications (ICCSA) 2003 (LNCS 2667), v.2667, pp.883-892
- Language
- English
- Type
- Conference Paper
- Abstract
- The important arithmetic operations over finite fields include exponentiation, division, and inversion. An exponentiation operation can be implemented using a series of squaring and multiplication operations over GF(2m) using a binary method, while division and inversion can be performed by the iterative application of an AB2 operation. Hence, it is important to develop a fast algorithm and efficient hardware for squaring, multiplication, and AB2 operations. The current paper presents new architectures for the simultaneous computation of multiplication and squaring operations, and the computation of an AB2 operation over GF(2m) generated by an irreducible AOP of degree m. The proposed architectures offer a significant improvement in reducing the hardware complexity compared with previous architectures, and can also be used as a kernel circuit for exponentiation, division, and inversion architectures. Furthermore, since the proposed architectures include regularity, modularity and concurrency, they can be easily designed on VLSI hardware and used in IC cards. © Springer-Verlag Berlin Heidelberg 2003.
- KSP Keywords
- Arithmetic operations, Binary Method, Finite fields, Hardware complexity, IC Card, VLSI hardware, efficient architecture, fast algorithm