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Conference Paper A new 6 GHz fully integrated low power low phase noise CMOS LC quadrature VCO
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Authors
Jae-Hong Chang, Yong-Sik Youn, Mun-Yang Park, Choong-Ki Kim
Issue Date
2003-06
Citation
Radio Frequency Integrated Circuits Symposium (RFIC) 2003, pp.295-298
Language
English
Type
Conference Paper
DOI
https://dx.doi.org/10.1109/RFIC.2003.1213947
Abstract
A new fully integrated low power and low phase noise 6 GHz quadrature VCO is designed and fabricated in standard commercial 0.18 /spl mu/m single-poly, 6-metal CMOS process. The one VCO-core draws only 1.6 mA of current from a 1.8 V supply. Total power consumption - include two VCO-cores and two VCO-buffers -for generating quadrature signal is 18 mW. Measured phase noise at 1 MHz offset from the center frequency is -115 dBc/Hz. It has tuning range of 1.2 GHz with low phase noise performance throughout the tuning range. It meets the requirements for IEEE802.11a and HiperLAN type 2 standards. Low power and low phase noise have been achieved simultaneously by the use of new proposed cascode coupling topology.
KSP Keywords
6 GHz, CMOS Process, Center frequency, Coupling topology, Fully integrated, Low phase noise, Low-Power, Noise performance, Quadrature VCO, Quadrature signal, Total power consumption