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A low power and low noise frequency synthesizer with a integrated quadrature VCO
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- Authors
- Seon-Ho Han, Yong-Sik Youn, Hyun-Kyu Yu, Mun-Yang Park
- Issue Date
- 2003-06
- Citation
- Radio Frequency Integrated Circuits Symposium (RFIC) 2003, pp.307-310
- Publisher
- IEEE
- Language
- English
- Type
- Conference Paper
- Abstract
- A frequency synthesizer including a integrated quadrature VCO and a few novel circuits is presented in a 0.18 um CMOS technology. A 16/17 dual modulus prescaler operates up to 5.1 GHz due to the fast (about 10 GHz) operation of the proposed complementary clocking (CC) dynamic flip-flop. Also, a phase frequency detector (PFD) utilizing the charge pump current feedback, generates low spurious tones irrespective of the temperature or supply variations. The measured reference spur is less than -120 dBc with a second order loop-filter of which bandwidth equals f/sub REF//50. The measured out- and in-band phase noise of the quadrature VCO is -140 dBc@8 MHz and -82dBc@10 kHz, respectively. With a 1.8 V power supply, the current consumption of the overall frequency synthesizer is only 7.5 mA except 50 /spl Omega/ driving buffers.
- KSP Keywords
- 0.18um CMOS, 10 Ghz, CMOS Technology, Charge pump, Current consumption, Current feedback, Dual-modulus prescaler, Flip-flop, Frequency synthesizer, Low Spurious, Low noise