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Conference Paper
Design and Implementation of high speed A/D Converters using Time Interleaving
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- Authors
- Young Woo Choi, Do Wook Kang, Dong Kyoo Kim
- Issue Date
- 2015-10
- Citation
- International Conference on Information and Communication Technology Convergence (ICTC) 2015, pp.1002-1005
- Publisher
- IEEE
- Language
- English
- Type
- Conference Paper
- Abstract
- Time Interleaved A/D Converter (TI-ADC) is a parallel combination of multiple ADCs having low sampling rates and it is capable of high-speed sampling in real time. The performance of the digital system to receive the analog signal depends on the performance of the ADC. However it has the disadvantage of increasing the cost using high-speed sampling ADC. To solve this problem, high-speed sampling ADC is implemented using time interleaving by a combination of a low cost, low-speed ADC and can be used for a system demanding high-speed real time sampling technology.
- KSP Keywords
- A/D converter, Analog signal, High-speed sampling, Low sampling rates, Low speed, Low-cost, Real Time Sampling, TI-ADC, design and implementation, digital system, sampling technology