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A Memory-Efficient Two-Stage String Matching Engine Using both Content-Addressable Memory and Bit-split String Matchers for Deep Packet Inspection
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- Authors
- 김현진, 최강일
- Issue Date
- 2014-07
- Citation
- 한국통신학회논문지, v.39B, no.7, pp.433-439
- ISSN
- 1226-4717
- Publisher
- 한국통신학회 (KICS)
- Language
- English
- Type
- Journal Article
- Abstract
- This paper proposes an architecture of two-stage string matching engine with content-addressablememory(CAM) and parallel bit-split string matchers for deep packet inspection(DPI). Each long signature isdivided into subpatterns with the same length, where subpatterns are mapped onto the CAM in the first stage. The long pattern is matched in the second stage using the sequence of the matching indexes from the CAM. Byadopting CAM and bit-split string matchers, the memory requirements can be greatly reduced in theheterogeneous string matching environments.
- KSP Keywords
- Bit-split, Content-addressable memory(CAM), First stage, Matching engine, Two-Stage, deep packet inspection(DPI), memory requirements, memory-efficient, string matching