최근 목소리를 이용하여 사용자를 인증하는 화자인증(speaker verification)에 대한 관심이 증가하고 있으며, 다양한 화자 인증방법 중에서 SVM을 적용한 방법이 다른 알고리즘에 비해 우수한 성능을 나타내고 있다. 그러나 SVM을 이용한 화자인증 방법은 복잡한 계산으로 인해 휴대폰 등 휴대기기에서 실시간 처리에 어려움이 있다. 본 논문에서는 SVM을 이용한 화자인증 알고리즘을 실시간으로 처리하기 위한 하드웨어 구조를 제안하였고, VHDL을 이용하여 모델링 후 실험한 결과를 분석하였으며 전체 시스템 구성에 대하여 설명하였다.
KSP Keywords
Speaker verification
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