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Journal Article
High-Performance Ultralow-Temperature Polycrystalline Silicon TFT Using Sequential Lateral Solidification
- Authors
- Yong-Hae Kim, Choong-Yong Sohn, Jung Wook Lim, Sun Jin Yun, Chi-Sun Hwang, Choong-Heui Chung, Young-Wook Ko, Jin Ho Lee
- Issue Date
- 2004-08
- Citation
- IEEE Electron Device Letters, v.25 no.8, pp.550-552
- ISSN
- 0741-3106
- Publisher
- IEEE
- Language
- English
- Type
- Journal Article
- Project Code
- 04MB2400, Flexible Play, Kang Kwang-Yong
- Abstract
- This letter presents technologies to fabricate ultralow-temperature (< 150 °C) polycrystalline silicon thin-film transistor (ULTPS TFT). Sequential lateral solidification is used for crystallization of RF magnetron sputter deposited amorphous silicon films resulting in a high mobility polycrystalline silicon (poly-Si) film. The gate dielectric is composed of plasma oxidation and Al2O3 grown by plasma-enhanced atomic layer deposition. The breakdown field on the poly-Si film was above 6.3 MV/cm. The fabricated ULTPS TFT showed excellent performance with mobility of 114 cm2/V 쨌s (nMOS) and 42 cm2/V 쨌s (pMOS), on/off current ratio of 4.20 × 106 (nMOS) and 5.7 × 105 (pMOS , small Vth of 2.6 V (nMOS) and -3.7 V (pMOS), and swing of 0.73 V/dec (nMOS) and 0.83 V/dec (pMOS). © 2004 IEEE.
- KSP Keywords
- 3 V, Breakdown field, High Mobility, High performance, ON/OFF current ratio, Plasma-enhanced atomic layer deposition, Poly-Si film, Polycrystalline silicon(poly-Si), Polycrystalline silicon thin-film transistor, RF magnetron sputter, Sequential lateral solidification