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Conference Paper Which consists of a transmitter, a receiver, the design on rf transceiver at 5 GHz band with package modeling
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Authors
Bonghyuk Park, Seungsik Lee, Jinho Ko, Jongmoon Kim, Jongwon Kim
Issue Date
2004-09
Citation
Vehicular Technology Conference (VTC) 2004 (Fall), pp.2143-2147
Publisher
IEEE
Language
English
Type
Conference Paper
DOI
https://dx.doi.org/10.1109/VETECF.2004.1400419
Abstract
The paper describes a novel CMOS heterodyne architecture at 5 GHz band which is fabricated in 0.18 /spl mu/m CMOS process operating from a power supply of 1.8 V. We designed the up-mixer, down-mixer and LNA for the 5 GHz band, and the VCO for the 2 GHz band related to our heterodyne architecture. The LPCC 24 pin package is used with package modeling and the 4 key blocks occupy a die area of about 1.5 mm/sup 2/. An off-chip power amplifier is to be used for overall power saving.
KSP Keywords
5 GHz, CMOS Process, GHz band, RF transceiver, off-chip, power amplifiers(PAs), power saving, power supply