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학술지 A New SOI LDMOSFET Structure with a Trench in the Drift Region for a PDP Scan Driver IC
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저자
손원소, 김상기, 손영호, 최시영
발행일
200402
출처
ETRI Journal, v.26 no.1, pp.7-12
ISSN
1225-6463
출판사
한국전자통신연구원 (ETRI)
DOI
https://dx.doi.org/10.4218/etrij.04.0103.0104
협약과제
04ZB1100, 반도체 Foundry 운영사업, 김보우
초록
To improve the characteristics of breakdown voltage and specific on-resistance, we propose a new structure for a LDMOSFET for a PDP scan driver IC based on silicon-on-insulator with a trench under the gate in the drift region. The trench reduces the electric field at the silicon surface under the gate edge in the drift region when the concentration of the drift region is high, and thereby increases the breakdown voltage and reduces the specific on-resistance. The breakdown voltage and the specific on-resistance of the fabricated device is 352 V and 18.8 m廓쨌cm2 with a threshold voltage of 1.0 V. The breakdown voltage of the device in the on-state is over 200 V and the saturation current at Vgs=5 V and Vds=20 V is 16 mA with a gate width of 150 μm.
KSP 제안 키워드
Breakdown voltage(BDV), Gate Width, Silicon On Insulator(SOI), Silicon surfaces, drift region, electric field, saturation current, specific on-resistance, threshold voltage(Vth)