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Conference Paper Effective Digital IO Pin Modeling Methodology Based on IBIS Model
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Authors
Won Ok Kwon, Kyoung Park
Issue Date
2004-10
Citation
Asian Simulation Conference (AsiaSim) 2004 (LNAI 3398), v.3398, pp.721-730
Publisher
Springer
Language
English
Type
Conference Paper
DOI
https://dx.doi.org/10.1007/978-3-540-30585-9_80
Abstract
IBIS (I/O buffer information specification) model is widely used in signal integrity analysis of on-board high-speed digital systems. IBIS model is converted equivalent SPICE behavioral model when used board-level simulations. It is important to represent accurately output buffer's switching characteristics converting IBIS model to SPICE behavioral model. This paper proposes a new modeling algorithm to represent output buffer's switching characteristics in IBIS model. The accuracy of the proposed algorithm has verified through SPICE simulation with other behavioral models. © Springer-Verlag Berlin Heidelberg 2005.
KSP Keywords
Behavioral model, High Speed, I/O buffer, IBIS Model, On-board, SPICE Simulation, Signal Integrity(SI), digital system, modeling methodology, output buffer, signal integrity analysis