상세정보
학술대회
Effective Digital IO Pin Modeling Methodology Based on IBIS Model
- 발행일
- 200410
- 출처
- Asian Simulation Conference (AsiaSim) 2004 (LNAI 3398), v.3398, pp.721-730
- 협약과제
- 05MH1100, 차세대 인터넷 서버기술개발, 김명준
- 초록
- IBIS (I/O buffer information specification) model is widely used in signal integrity analysis of on-board high-speed digital systems. IBIS model is converted equivalent SPICE behavioral model when used board-level simulations. It is important to represent accurately output buffer's switching characteristics converting IBIS model to SPICE behavioral model. This paper proposes a new modeling algorithm to represent output buffer's switching characteristics in IBIS model. The accuracy of the proposed algorithm has verified through SPICE simulation with other behavioral models. © Springer-Verlag Berlin Heidelberg 2005.
- KSP 제안 키워드
- Behavioral model, High Speed, I/O buffer, IBIS Model, On-board, SPICE Simulation, Signal Integrity(SI), digital system, modeling methodology, output buffer, signal integrity analysis