상세정보
학술지
30-nm recessed S/D SOI MOSFET with an ultrathin body and a low SDE resistance
- 발행일
- 200507
- 출처
- IEEE Electron Device Letters, v.26 no.7, pp.486-488
- ISSN
- 0741-3106
- 출판사
- IEEE
- 협약과제
- 05MF1200, 실리콘 미래 신소자 원천 기술개발, 이성재
- 초록
- A novel ultrathin body SOI MOSFET with a recessed source-drain (S/D) structure is proposed to reduce the S/D extension (SDE) resistance and the feasibility on the proposed device is checked. A recessed buried oxide under the SDE regions is completely filled with the heavily doped polysilicon, which can lead to a low SDE resistance. A recessed S/D SOI MOSFET with 30 nm gate length and 5 nm thick undoped channel, was successfully fabricated and showed the good SCE immunities; little punch-through, the drain-induced barrier lowering of 140 mV/V, and the subthreshold slope of 79 mV/dec. © 2005 IEEE.
- KSP 제안 키워드
- 5 nm, Buried oxide, Heavily doped, Punch-through, SOI MOSFET, Subthreshold slope(SS), drain-induced barrier lowering(DIBL), gate length, ultra-thin body(UTB), undoped channel