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Conference Paper
A Novel CMOS Down-Conversion Mixer with Current Reuse Technique
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- Authors
- No Gil Myoung, Byoung Gun Choi, Seong Su Park, Chul Soon Park
- Issue Date
- 2005-12
- Citation
- Asia-Pacific Microwave Conference (APMC) 2005, pp.1-4
- Publisher
- IEEE
- Language
- English
- Type
- Conference Paper
- Abstract
- A novel low voltage and power mixer topology for 5GHz wireless LAN applications is presented in this paper. To reduce power dissipation, a novel mixer topology with a low supply voltage and using the current reuse technique is designed using a 0.18 μm CMOS process. The designed down-conversion mixer has a conversion gain of 7.5dB, a P1dB of -16Bm and an HP3 of -6dBm, respectively, with LO power of -7dBm while consuming 1.6mA under a 1.5V supply voltage. The chip size including pads is 0.77mm × 0.81mm. © 2005 IEEE.
- KSP Keywords
- CMOS Process, Conversion gain, Down-conversion mixer, LO power, Low Supply Voltage, Wireless Local Area Networks(WLANs), current reuse, low voltage, power dissIPation