IP Based SoC Design Conference and Exhibition (IP-SoC) 2005, pp.1-4
Language
English
Type
Conference Paper
Abstract
In this paper, we introduce DMAC (Direct Memory Access Controller) which can detect target peripheral's burst count. When DMA request is occurred by any peripheral, DMAC classifies requested channel then accesses peripheral by burst count times. Burst count value is set by processor when DMAC is initialized. But how about any peripheral which has unfixed burst count? Whenever DMA requested by such peripheral, processor should set DMAC burst count register value by interrupt handling. The other way is divide peripheral's DMA request to single and burst request. Above methods need additional logic in peripheral or addition time to handle interrupt routine. Our solution is that DMAC access DMA requested channel and catch it's burst count value by itself. It reduce one interrupt request handling from peripheral to announce its burst count to processor.We implemented DMAC on AMBA (Advanced Micro-controller Bus Architecture) [1] based system using Xilinx ® XC2V8000. The area for DMAC is about 6% SLICES (2,946 out of 46,592
KSP Keywords
Bus Architecture, Interrupt handling, Micro-controller(AVR), based system, direct memory access, request handling
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