상세정보
학술대회
Automatic Tuning Circuits for Gm-C Filters
- 발행일
- 200512
- 출처
- International Conference on Electronics, Circuits and Systems (ICECS) 2005, pp.1-4
- 협약과제
- 05MB3400, H/W로 재구성 가능한 차세대 지능형 통합단말용 SoC(차세대 통합 휴대 단말 기술), 조경익
- 초록
- This paper presents a CMOS on-chip automatic tuning circuit using phase lock loop (PLL) technique for continuous-time Gm-C filters. In the tuning circuit, to achieve the maximum tuning accuracy, the new VCO architecture that generates precisely fully differential clock swings and keeps the absolute oscillation in all operating condition was proposed. Measured results show that the designed automatic tuning circuit is suitable for the continuous-time Gm-C filter. The verified system is fabricated in a 0.18μm CMOS technology and consumes 2.78mW at a 1.8V supply voltage.
- KSP 제안 키워드
- Automatic tuning, CMOS Technology, Continuous-Time, Fully differential, Gm-C filter, On-chip, Operating conditions, Supply voltage, Tuning circuit, lock loop(SOGI-FLL), phase lock loop