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Journal Article VLSI Implementation of H.264 Video Decoder for Mobile Multimedia Application
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Authors
Seong Mo Park, Mi Young Lee, Seung Chul Kim, Kyoung Seon Shin, Ig Kyun Kim, Han Jin Cho, Hee Bum Jung, Duk Dong Lee
Issue Date
2006-08
Citation
ETRI Journal, v.28, no.4, pp.525-528
ISSN
1225-6463
Publisher
한국전자통신연구원 (ETRI)
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.4218/etrij.06.0206.0009
Abstract
In this letter, we present a design of a single chip video decoder called advanced mobile video ASIC (A-MoVa) for mobile multimedia applications. This chip uses a mixed hardware/software architecture to improve both its performance and its flexibility. We designed the chip using a partition between the hardware and software blocks, and developed the architecture of an H.264 decoder based on the system-on-a-chip (SoC) platform. This chip contains 290,000 logic gates, 670,000 memory gates, and its size is 7.5 mm×7.5 mm (using 0.25 micron 4-layers metal CMOS technology).
KSP Keywords
CMOS Technology, H.264 decoder, H.264 video decoder, Hardware and software, Mobile Multimedia, Mobile video, Multimedia Applications, Single chip, System-on-a-Chip, VLSI implementation, logic gate