상세정보
학술지
VLSI Implementation of H.264 Video Decoder for Mobile Multimedia Application
- 발행일
- 200608
- 출처
- ETRI Journal, v.28 no.4, pp.525-528
- ISSN
- 1225-6463
- 출판사
- 한국전자통신연구원 (ETRI)
- 협약과제
- 05MB4300, 저전력 그래픽처리 SoC Platform, 정희범
- 초록
- In this letter, we present a design of a single chip video decoder called advanced mobile video ASIC (A-MoVa) for mobile multimedia applications. This chip uses a mixed hardware/software architecture to improve both its performance and its flexibility. We designed the chip using a partition between the hardware and software blocks, and developed the architecture of an H.264 decoder based on the system-on-a-chip (SoC) platform. This chip contains 290,000 logic gates, 670,000 memory gates, and its size is 7.5 mm×7.5 mm (using 0.25 micron 4-layers metal CMOS technology).
- KSP 제안 키워드
- CMOS Technology, H.264 decoder, H.264 video decoder, Logic gate, Mobile Multimedia, Mobile video, Single-Chip, System-on-a-Chip, VLSI implementation, hardware and software, multimedia applications