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A 20Gb/s 1:4 DEMUX without Inductors in 0.13μm CMOS
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- 발행일
- 200609
- 출처
- International Solid-State Circuits Conference (ISSCC) 2006, pp.1-8
- 협약과제
- 05MB3100, 초고속 유무선 네트워크용 SoC, 유현규
- 초록
- A 20Gb/s 1:4 DEMUX is implemented in a 0.13μm CMOS technology. The chip has no inductors and features a coupled latch with shared-current-source and buffer-insertion scheme, a divide-by-2 circuit with a static frequency divider, and a DLL. The measured eye-opening width and height are 71.3% and 52%, respectively. The 1.05×0.92mm2 chip consumes 210mW from a 1.2V supply. © 2006 IEEE.
- KSP 제안 키워드
- CMOS Technology, Opening width, divide-by-2, static frequency divider