A double-balanced low voltage and low power down-conversion mixer with high linearity implemented with 0.18μm CMOS technology is described. A mixing mechanism uses nonlinearity of transistors regardless of saturation or triode mode operations. The measurements are performed using a Teflon PCB test fixture. The fabricated mixer features a conversion gain of 6.9dB, an input P1dB of -5dBm and an IIP3 of +4dBm with small -12dBm LO power while consumes 1mA from a 0.8V supply.
KSP Keywords
CMOS Technology, Conversion gain, Direct conversion mixer, Down-conversion mixer, High linearity, LO power, Low voltage, Mixing mechanism, Power down, Test fixture, double-balanced
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