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Conference Paper
32Bit SIMSD Path Architecture For High Energy Efficiency Using Single/Parallel Mode Bit and 2 Step Gating Technique
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- Authors
- Yil Suk Yang, Tae Moon Roh, Dae Woo Lee, H. Kwon, Jong Dae Kim
- Issue Date
- 2006-02
- Citation
- 한국반도체 학술 대회 (KCS) 2006, pp.1-2
- Publisher
- 대한전기학회
- Language
- English
- Type
- Conference Paper
- KSP Keywords
- Gating technique, Parallel mode, high energy efficiency