상세정보
학술지
Low-Power Bus Encoding with Crosstalk Delay Elimination
- 저자
- 여준기, 김태환
- 발행일
- 200603
- 출처
- IEE Proceedings : Vision, Image and Signal Processing, v.153 no.2, pp.93-100
- ISSN
- 1350-245X
- 출판사
- IET
- 협약과제
- 06MB1100, 나노소자기반 회로 설계기술 개발, 김종대
- 초록
- In deep-submicron technology, minimising the propagation delay and power consumption on buses is the most important design objective in system-on-chip design. In particular, the coupling effects between wires on the bus that can cause serious problems such as crosstalk delay, noise and power consumption. Most of the previous work on bus encoding targeted either (1) minimising the power consumption on bus, (2) minimising the crosstalk delay, or (3) exploiting the known probabilistic information of data, but not all of them. The authors propose a new bus-encoding algorithm that not only minimises the dynamic power consumption on bus but also eliminates the crosstalk delay. The authors achieve the combined objective of (1) and (2) by analysing, formulating and solving the problem of minimising a weighted sum of the self-transition and cross-coupled transition activities on bus in the context of the concept of self-shield encoding. From experiments using a set of benchmark designs, it is shown that the proposed encoding technique consumes 15.4-47.4% less power than existing techniques while totally eliminating the crosstalk delay.
- KSP 제안 키워드
- Bus encoding, Coupling effects, Design objective, Dynamic power consumption, Encoding Technique, Encoding algorithm, Low-power bus, Probabilistic information, Propagation delay, System-On-Chip(SoC), System-On-Chip Design