상세정보
학술지
Fast Fouier Transform Algorithm for Low-Power and Area-Efficient Implementation
- 저자
- 오정열, 임명섭
- 발행일
- 200604
- 출처
- IEICE Transactions on Communications, v.E89-B no.4, pp.1425-1429
- ISSN
- 0916-8516
- 출판사
- 일본, 전자정보통신학회 (IEICE)
- 협약과제
- 05MH2200, WPAN 기반 무선홈네트워킹 기술 개발(High Data Rate WPAN 기반 초고속 무선 홈네트워킹 기술개발), 김재영
- 초록
- This paper proposes the new radix-24 FFT algorithm and an efficient pipeline FFT architecture based on the algorithm for wideband OFDM systems. The proposed pipeline architecture has the same number of multipliers as that of the radix-22 algorithm. However, the multiplication complexity is reduced more than 30% by using the newly proposed CSD constant multipliers instead of the programmable multipliers. From the synthesis simulations of a standard 0.35//m CMOS SAMSUNG process, the proposed CSD constant complex multiplier achieved a reduction of more than 60% of the power consumption/area when compared with the conventional programmable complex multiplier. Copyright © 2006 The Institute of Electronics, Information and Communication Engineers.
- KSP 제안 키워드
- Area-Efficient, Complex Multiplier, FFT algorithm, Information and communication, Low-Power, OFDM systems, Power Consumption, Radix-2, efficient implementation, pipeline architecture, wideband OFDM