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Journal Article Fast Fouier Transform Algorithm for Low-Power and Area-Efficient Implementation
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Authors
Jung Yeol Oh, Myoung Seob Lim
Issue Date
2006-04
Citation
IEICE Transactions on Communications, v.E89-B, no.4, pp.1425-1429
ISSN
0916-8516
Publisher
일본, 전자정보통신학회 (IEICE)
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1093/ietcom/e89-b.4.1425
Project Code
05MH2200, The Development of high data rate WPAN based very high-speed wireless home networking technology, Kim Jae Young
Abstract
This paper proposes the new radix-24 FFT algorithm and an efficient pipeline FFT architecture based on the algorithm for wideband OFDM systems. The proposed pipeline architecture has the same number of multipliers as that of the radix-22 algorithm. However, the multiplication complexity is reduced more than 30% by using the newly proposed CSD constant multipliers instead of the programmable multipliers. From the synthesis simulations of a standard 0.35//m CMOS SAMSUNG process, the proposed CSD constant complex multiplier achieved a reduction of more than 60% of the power consumption/area when compared with the conventional programmable complex multiplier. Copyright © 2006 The Institute of Electronics, Information and Communication Engineers.
KSP Keywords
Area-Efficient, Complex Multiplier, FFT algorithm, Information and communication, Low-Power, OFDM systems, Power Consumption, Radix-2, efficient implementation, pipeline architecture, wideband OFDM