상세정보
학술대회
Design and Implementation of FPGA Based High-Performance Intrusion Detection System
- 발행일
- 200605
- 출처
- International Conference on Intelligence and Security Informatics (ISI) 2006 (LNCS 3975), v.3975, pp.724-725
- 협약과제
- 06MK2400, Network 위협의 Zero-Day Attack 대응을 위한 실시간 공격 Signature 생성 및 관리 기술개발, 장종수
- 초록
- As network technology presses forward, Gigabit Ethernet has become the actual standard for large network installations. Therefore, it is necessary to research on security analysis mechanism, which is capable to process high traffic volume over the high-speed network. This paper proposes FPGA based high-performance IDS to detect and respond variant attacks on high-speed links. Most of all, It is possible through the pattern matching function and heuristic analysis function that is processed in FPGA Logic, In other words, we focus on the network intrusion detection mechanism applied in high-speed network. © Springer-Verlag Berlin Heidelberg 2006.
- KSP 제안 키워드
- Gigabit Ethernet, Heuristic analysis, High performance, High speed network, Intrusion detection system(IDS), Large network, Network Intrusion Detection, Network technology, Traffic volume, design and implementation, detection mechanism