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Conference Paper
Design and Implementation of FPGA Based High-Performance Intrusion Detection System
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- Authors
- Byoung-Koo Kim, Young-Jun Heo, Jin-Tae Oh
- Issue Date
- 2006-05
- Citation
- International Conference on Intelligence and Security Informatics (ISI) 2006 (LNCS 3975), v.3975, pp.724-725
- Language
- English
- Type
- Conference Paper
- Project Code
- 06MK2400, Development of Signature Generation and Management Technology against Zero-day Attack, Jong Soo Jang
- Abstract
- As network technology presses forward, Gigabit Ethernet has become the actual standard for large network installations. Therefore, it is necessary to research on security analysis mechanism, which is capable to process high traffic volume over the high-speed network. This paper proposes FPGA based high-performance IDS to detect and respond variant attacks on high-speed links. Most of all, It is possible through the pattern matching function and heuristic analysis function that is processed in FPGA Logic, In other words, we focus on the network intrusion detection mechanism applied in high-speed network. © Springer-Verlag Berlin Heidelberg 2006.
- KSP Keywords
- Gigabit Ethernet, Heuristic analysis, High performance, High speed network, Intrusion detection system(IDS), Large network, Network Intrusion Detection, Network technology, Traffic volume, design and implementation, detection mechanism