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Conference Paper A 8/16 GHz Frequency Doubler MMIC for Space Application
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Authors
D. H. Shin, D. P. Chang, I. B. Yom, K. K. Ryu
Issue Date
2006-06
Citation
AIAA International Communications Satellite Systems Conference (ICSSC) 2006, pp.957-960
Publisher
AIAA
Language
English
Type
Conference Paper
Abstract
A 8/16 GHz frequency doubler MMIC for communication satellite transponder is designed and fabricated using series resonant circuit as a reflector. Adopting the series resonant reflector composed of lumped L, C elements, the size of MMIC doubler could be reduced. The conversion gain of doubler is -1.95 dB at the 9 GHz input frequency and 8 dBm input power. The 3 dB bandwidth in terms of input frequency is from 7.6 to 9.6 GHz which corresponds to 23%. Fundamental suppression is over 10 dBc and 3rd harmonic suppression is over 20 dBc within 3 dB bandwidth. The frequency doubler configuration presented in this paper could be helpful for designing microwave and sub-millimeterwave MMIC frequency multipliers that have the relatively low input frequency.
KSP Keywords
3-dB bandwidth, 3rd harmonic, 6 GHz, Communication satellite, Conversion gain, Harmonic suppression, Input power, Low Input Frequency, MMIC doubler, Resonant reflector, Series resonant circuit