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학술지 Pentacene Thin-Film Transistors and Inverters with Dual-Gate Structure
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저자
구재본, 임정욱, 김성현, 구찬회, 임상철, 이정헌, 윤선진, 양용석
발행일
200610
출처
Electrochemical and Solid-State Letters, v.9 no.11, pp.G320-G322
ISSN
1099-0062
출판사
Electrochemical Society (ECS)
DOI
https://dx.doi.org/10.1149/1.2335942
협약과제
06ZB1300, 플라스틱 트랜지스터 소자/소재 기술, 김성현
초록
We report on the fabrication of dual-gate organic thin-film transistors using plasma-enhanced atomic layer deposited 150 nm thick Al2O 3 and 300 nm thick parylene as gate dielectrics and pentacene as a semiconductor. The threshold voltage (Vth) is changed from 14.5 to -1.5V when the voltage bias of the top-gate electrode is changed from -10 to 20V. The voltage transfer characteristics of an inverter with a dual-gate driver transistor and a single-gate load transistor, specifically, swing range and inversion voltage, have been artificially controlled by changing the voltage bias of the top-gate electrode. © 2006 The Electrochemical Society. All rights reserved.
KSP 제안 키워드
Dual-gate structure, Inversion voltage, O 3, Organic thin-film transistors, Pentacene thin-film transistors, Plasma-enhanced, Thin-Film Transistor(TFT), an inverter, atomic layer, dual gate(DG), gate dielectric