상세정보
학술지
Threshold Voltage Control of Pentacene Thin-Film Transistor with Dual-Gate Structure
- 발행일
- 200612
- 출처
- Journal of Information Display, v.7 no.3, pp.27-30
- ISSN
- 1598-0316
- 출판사
- 한국정보디스플레이학회
- 협약과제
- 06ZB1300, 플라스틱 트랜지스터 소자/소재 기술, 김성현
- 초록
- This paper presents a comprehensive study on threshold voltage (Vth) control of organic thin-film transistors (OTFTs) with dual-gate structure. The fabrication of dual-gate pentacene OTFTs using plasma-enhanced atomic layer deposited (PEALD) 150 nm thick Al2O3 as a bottom gate dielectric and 300 nm thick parylene or PEALD 200 nm thick Al2O3 as both a top gate dielectric and a passivation layer was investigated. The Vth of OTFT with 300 nm thick parylene as a top gate dielectric was changed from 4.7 V to 1.3 V and that with PEALD 200 nm thick Al2O3 as a top gate dielectric was changed from 1.95 V to -9.8 V when the voltage bias of top gate electrode was changed from -10 V to 10 V. The change of Vth of OTFT with dual-gate structure was successfully investigated by an analysis of electrostatic potential. © 2006 Taylor & Francis Group, LLC.
- KSP 제안 키워드
- 3 V, 4.7 V, Bottom gate, Comprehensive study, Dual-gate structure, Electrostatic potential, Organic thin-film transistors (otfts), Plasma-enhanced, Thin-Film Transistor(TFT), Threshold voltage control, atomic layer