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학술대회 Design and Implementation of a High-Speed Descrambling Engine for Multi-stream CableCARD
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저자
정준영, 권오형, 이수인
발행일
200701
출처
International Conference on Consumer Electronics (ICCE) 2007, pp.1-2
DOI
https://dx.doi.org/10.1109/ICCE.2007.341404
협약과제
06MR3400, 하향 1Gbps 디지털 케이블 송수신 시스템 개발, 이수인
초록
In this paper, we have present a hardware design of the high-speed descrambling engine for supporting multi channels in Multi-Stream CableCARD. The designed descrambling engine has been implemented on a FPGA. The presented design has a parallel processing structure that is extendable according to required input bandwidth. Especially we have verified that designed descrambling engine supported up to 200 Mbps input bandwidth. © 2007 IEEE.
KSP 제안 키워드
Hardware Design, High Speed, Multi-stream, Parallel Processing, design and implementation