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학술대회 Fast Ray-Triangle Intersection Computation Using Reconfigurable Hardware
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저자
김성수, 남승우, 이인호
발행일
200703
출처
International Conference on Computer Vision / Computer Graphics Collaboration Techniques (MIRAGE) 2007 (LNCS 4418), v.4418, pp.70-81
DOI
https://dx.doi.org/10.1007/978-3-540-71457-6_7
협약과제
07MC1600, 기능 확장형 초고속 랜더러 개발, 최진성
초록
We present a novel FPGA-accelerated architecture for fast collision detection among rigid bodies. This paper describes the design of the hardware architecture for several primitive intersection testing components implemented on a multi-FPGA Xilinx Virtex-II prototyping system. We focus on the acceleration of ray-triangle intersection operation which is the one of the most important operations in various applications such as collision detection and ray tracing. Our implementation result is a hardware-accelerated ray-triangle intersection engine that is capable of out-performing a 2.8 GHz Xeon processor, running a well-known high performance software ray-triangle intersection algorithm, by up to a factor of seventy. In addition, we demonstrate that the proposed approach could prove to be faster than current GPU-based algorithms as well as CPU based algorithms for ray-triangle intersection. © Springer-Verlag Berlin Heidelberg 2007.
KSP 제안 키워드
Collision detection, GPU-based algorithms, Hardware Architecture, High performance, Intersection Computation, Intersection operation, Multi-FPGA, Ray tracing, Reconfigurable Hardware, Rigid bodies, Xilinx virtex