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A Flip-Chip-Packaged InP HBT Transimpedance Amplifier for 40-Gb/s Optical Link Applications
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- Authors
- Chul-Won Ju, Jong-Min Lee, Seong-Il Kim, Byoung-Gue Min, Kyung-Ho Lee
- Issue Date
- 2007-03
- Citation
- Journal of the Korean Physical Society, v.50, no.3, pp.862-865
- ISSN
- 0374-4884
- Publisher
- 한국물리학회 (KPS)
- Language
- English
- Type
- Journal Article
- Abstract
- A 40-Gb/s transimpedance amplifier was designed and fabricated with InP/InGaAs heterojunction bipolar transistor (HBT) technology. In this study, we interconnect a 40-Gbps transimpedance amplifier to a duroid substrate by flip-chip bonding instead of conventional wire bonding for the interconnection. For the flip-chip bonding, we developed a fine pitch bump with a 70-μm diameter and a 150-μm pitch by using a wafer level package (WLP) process. To study the effect of the WLP, we measured and analyzed the electrical performances in the wafer and in the package module using the WLP. The small signal gains in the wafer and in the package module were 7.24 dB and 6.93 dB, respectively. The difference in the small signal gain between the wafer and the package module was 0.31 dB. This small difference in gain was due to the short interconnection length obtained by using the bump. The return loss was under -10 dB in both the wafer and the module. Thus, the WLP process can be used for millimeter wave GaAs microwave monolithic integrated circuits (MMICs) with a fine pitch pad, and a duroid substrate can be used in the flip-chip bonding process.
- KSP Keywords
- Bonding process, Fine pitch bump, Flip-chip bonding, Heterojunction Bipolar Transistors(HBTs), InP HBT, InP/InGaAs heterojunction, Microwave monolithic integrated circuits(MMIC), Return loss(RL), Small signal gain, Transimpedance Amplifier(TIA), Wafer level package