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학술지 A Flip-Chip-Packaged InP HBT Transimpedance Amplifier for 40-Gb/s Optical Link Applications
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저자
주철원, 이종민, 김성일, 민병규, 이경호
발행일
200703
출처
Journal of the Korean Physical Society, v.50 no.3, pp.862-865
ISSN
0374-4884
출판사
한국물리학회 (KPS)
DOI
https://dx.doi.org/10.3938/jkps.50.862
협약과제
06MB2100, 40G 모듈, 이명현
초록
A 40-Gb/s transimpedance amplifier was designed and fabricated with InP/InGaAs heterojunction bipolar transistor (HBT) technology. In this study, we interconnect a 40-Gbps transimpedance amplifier to a duroid substrate by flip-chip bonding instead of conventional wire bonding for the interconnection. For the flip-chip bonding, we developed a fine pitch bump with a 70-μm diameter and a 150-μm pitch by using a wafer level package (WLP) process. To study the effect of the WLP, we measured and analyzed the electrical performances in the wafer and in the package module using the WLP. The small signal gains in the wafer and in the package module were 7.24 dB and 6.93 dB, respectively. The difference in the small signal gain between the wafer and the package module was 0.31 dB. This small difference in gain was due to the short interconnection length obtained by using the bump. The return loss was under -10 dB in both the wafer and the module. Thus, the WLP process can be used for millimeter wave GaAs microwave monolithic integrated circuits (MMICs) with a fine pitch pad, and a duroid substrate can be used in the flip-chip bonding process.
KSP 제안 키워드
Bonding process, Fine pitch bump, Flip-chip bonding, Heterojunction Bipolar Transistors(HBTs), InP HBT, InP/InGaAs heterojunction, Microwave monolithic integrated circuits(MMIC), Return loss(RL), Small signal gain, Transimpedance Amplifier(TIA), Wafer level package