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학술대회 An Implementation and Performance Analysis of Slave-Side Arbitration Schemes for the ML-AHB BusMatrix
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저자
황수연, 박형준, 장경선
발행일
200703
출처
Symposium on Applied Computing (SAC) 2007, pp.1545-1551
DOI
https://dx.doi.org/10.1145/1244002.1244333
협약과제
06MM1400, 3G Evolution 무선전송 기술 개발, 방승찬
초록
The slave-side arbitration is different from the master-side arbitration based on the request and grant signals. The slave-side arbitration uses the response signals of slave for arbitration. Also, the arbitration overhead of the slave-side arbitration is 10% smaller than that of the master-side arbitration. In this paper, we implement and analyze the slave-side arbitration schemes for the ML-AHB busmatrix. We implemented the ML-AHB busmatrixes with fixed priority, round robin and dynamic priority arbitration schemes. Our busmatrix implementation particularly reduces area and clock period by 17% and 19% respectively, compared with those of busmatrix of ARM by virtue of the masking mechanism. With the performance simulations, we observed that when there are few masters with long job length in a bus system, the dynamic priority based arbitration shows the maximum performance and in other cases the arbitration based on round robin shows the highest performance. In addition, the arbitration scheme with transaction based multiplexing shows higher performance than the same arbitration scheme with single transfer based switching in an application with frequent accesses to the long latency devices or memories such as SDRAM. The improvements of the arbitration scheme with transaction based multiplexing are 26%, 42% and 51%, respectively when the latency times of SDRAM are 1, 2 and 3 clock cycles. Copyright 2007 ACM.
KSP 제안 키워드
AHB busmatrix, Bus system, Clock Period, Dynamic Priority, Higher performance, Performance analysis, Priority-Based, fixed priority, round robin