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Binary-Truncated CDMA-Based On-Chip Network
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- Authors
- Ik-Jae Chun, Tae-Moon Roh, Bo-Gwan Kim
- Issue Date
- 2007-05
- Citation
- International Symposium on Circuits and Systems (ISCAS) 2007, pp.397-400
- Publisher
- IEEE
- Language
- English
- Type
- Conference Paper
- Abstract
- In this paper we present a new communication network for on-chip interconnection. The network concentrates on small size communication link, non blocking effect, scalability. The network is based on a direct sequence code division multiple access (DS-CDMA) technique with a binary-truncated channel By the truncation, the network drastically reduces data transfer lines. Our network architecture is largely divided into four modules: a CDMA-based network interface, an interconnection module, a synchronizer, and a hubnetwork interface. Especially the network includes a reverse channel for the efficiency of packet flow control. We guarantee the scalability of network by both a PN-code reuse and a hierarchical structure. We also decouple functional and communication tasks for scalability and utilize a modular architecture for flexibility. The network architecture is analyzed in terms of performance, area, and physical architecture. Our network is done using fully synthesizable Verilog HDL to enhance the portability between process technologies. © 2007 IEEE.
- KSP Keywords
- Code Reuse, Code division Multiple Access(CDMA), Communication link, Data transfer, Direct-sequence(DS), Direct-sequence code-division multiple-access(DS-CDMA), Modular Architecture, Network Architecture, On-Chip Network, Reverse channel, Verilog HDL