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Conference Paper A 15-GHz 7-channel SiGe:C PLL for 60-GHz WPAN Application
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Authors
Ja-Yol Lee, Sang-Heung Lee, Hae Cheon Kim, Hyun-Kyu Yu
Issue Date
2007-06
Citation
Radio Frequency Integrated Circuits Symposium (RFIC) 2007, pp.537-540
Publisher
IEEE
Language
English
Type
Conference Paper
DOI
https://dx.doi.org/10.1109/RFIC.2007.380941
Abstract
In this paper, we present the design of 15-GHz frequency synthesizer for 60-GHz WPAN. The PLL generates 7 channels of output signals with 250 MHz step by using the highspeed programmable divider operating up to 10 GHz. A double cross-coupled LC VCO is used for achieving higher oscillation frequency and shows about 20% tuning range. The PLL represents phase noise of- 88 dBc/Hz at 1 MHz offset from 15.75 GHz and consumes 115 mA at 2.5 V supply voltage. The PLL occupies 0.7 × 0.8 mm2 area and is fabricated using 0.25μm SiGe:C BiCMOS process technology. © 2007 IEEE.
KSP Keywords
10 Ghz, 250 MHz, 5 GHz, 60 GHz, BiCMOS process, Frequency synthesizer, LC voltage controlled oscillator(LC-VCO), Oscillation Frequency, Supply voltage, Tuning Range, cross-coupled LC VCO