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Conference Paper Low Power 2.5-Gb/s CMOS Burst-Mode Transimpedance Amplifier with Fast Response Time Using a Novel Peak Detection Circuit
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Authors
Young-Ho Kim, Eun-Ok Kim, Wonjong Kim
Issue Date
2015-12
Citation
International Conference on Electronics, Circuits and Systems (ICECS) 2015, pp.225-228
Language
English
Type
Conference Paper
DOI
https://dx.doi.org/10.1109/ICECS.2015.7440289
Abstract
A 2.5 Gb/s CMOS burst-mode transimpedance amplifier (BM-TIA) with a novel peak detection circuit is designed in this paper. The proposed peak detection circuit changes quickly the gain mode of the BM-TIA and then improves the data transmission capacity of the PON system with low power consumption. In order to obtain quick response time of the BM-TIA, a RC-LPF, an amplifier followed it and a replica circuit of the amplifier are built in. This BM-TIA was fabricated in 1P6M 0.18 μm CMOS process. The designed IC exhibits a quick response of 11 nsec for a 2.5 Gb/s burst preamble input. In this condition, this chip of 4 channel consumes 195.4 mW from a 1.8 V supply. In high gain mode, the BM-TIA achieves a gain of 66 dB with 2.45 GHz bandwidth and the eye jitter (rms) of 4.243 ps.
KSP Keywords
2.45 GHz, CMOS Process, Data transmission, Fast response time, High Gain, Low power consumption, PON system, Peak detection, Response time(RT), Transimpedance Amplifier(TIA), Transmission Capacity