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학술지 Novel Organic Inverters with Dual-Gate Pentacene Thin-Film Transistor
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저자
구재본, 구찬회, 임정욱, 김성현
발행일
200710
출처
Organic Electronics, v.8 no.5, pp.552-558
ISSN
1566-1199
출판사
Elsevier
DOI
https://dx.doi.org/10.1016/j.orgel.2007.04.001
협약과제
06IB1500, 가교가 가능한 유기 능동 소재 기술 개발, 김성현
초록
We report on the fabrication and characterization of dual-gate pentacene organic thin-film transistors (OTFTs) with plasma-enhanced atomic-layer-deposited (PEALD) 150 nm thick Al2O3 as a bottom-gate dielectric and PEALD 200 nm thick Al2O3 as a top-gate dielectric. The Vth of dual-gate OTFT has changed systematically with the application of voltage bias to top-gate electrode. When voltage bias from -10 V to 10 V is applied to top gate, Vth changes from 1.95 V to -9.8 V. Two novel types of the zero drive load logic inverter with dual-gate structure have been proposed and fabricated using PEALD Al2O3 gate dielectrics. Because the variation of Vth due to chemical degradation and the spatial variation of Vth are inherent in OTFTs, the compensation technology by dual-gate structure can be essential to OTFT applications. © 2007 Elsevier B.V. All rights reserved.
KSP 제안 키워드
Bottom gate, Compensation technology, Dual-gate structure, Logic inverter, Organic thin-film transistors (otfts), Plasma-enhanced, Spatial Variation, Thin-Film Transistor(TFT), chemical degradation, dual gate(DG), fabrication and characterization