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Design and Implementation of DBPSK Modem for Sensor Node
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- Authors
- Won-Chul Choi, Nae-Soo Kim
- Issue Date
- 2007-07
- Citation
- International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) 2007, pp.282-283
- Publisher
- IEEE
- Language
- English
- Type
- Conference Paper
- Abstract
- In this paper we implemented DBPSK (differential binary phase shift keying)-modem designed for low-cost, low-power, short-range wireless communications. The proposed architecture is capable of estimating and compensating a large carrier frequency offset up to ± 80ppm without performance degradation. The proposed modem supports the data rate of 40kbps with the direct sequence spread spectrum technique and with the BPSK chip modulation, analog/RF interface through 6-bit DAC and 4-bit ADCs, automatic gain control with wide dynamic range of more than 90dB, carrier sensing with flexible sensitivity selection based on signal power and signal correlation, and robust synchronization and tracking algorithms including the correction of the carrier frequency offset and variation and symbol time tracking. In order to verify the function of the proposed modem, we use verilog-HDL under test-bench including simulated channel and radio conditions which include additive white Gaussian noise, carrier frequency offset, symbol frequency offset, multi-path, carrier phase noise, IQ mismatch, and DC tone. The complex white Gaussian noise is added to the received signal to simulate the thermal noise whose amount is given as the signal the noise power ratio (SNR).
- KSP Keywords
- Additive white Gaussian noise(AWGN), Automatic Gain Control(AGC), Binary Phase Shift Keying, Carrier Frequency Offset, Carrier Sensing, Carrier phase, Direct-sequence(DS), Direct-sequence spread-spectrum(DSSS), IQ mismatch, Low-Power, Low-cost