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Conference Paper
On-Chip Network based Virtual Platform for Multimedia Applications
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- Authors
- June-Young Chang, Young-Hwan Bae, Mi-Young Lee, Han-Jin Cho
- Issue Date
- 2007-07
- Citation
- International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) 2007, pp.699-700
- Publisher
- IEEE
- Language
- English
- Type
- Conference Paper
- Abstract
- This paper describes how to design and verify multimedia applications using on-chip network based virtual platform. In order to make it available in various abstraction-level design environments, we developed RTL, cycle level, and transaction level on-chip network models in SystemC. Based on these on-chip network models, we built virtual platforms for multimedia applications. CLM(cycle level) and TLM(transaction level) virtual paltforms are 10 to 100 times faster than RTL in terms of the simulation time of H.264 decoder, respectively. We analyzed performance of H.264 decoders based on on-chip network and on-chip bus using fast simulation with virtual platforms. Experimental results show that the performance of H.264 decoder based on on-chip network is improved over 47.8% compared to the design based AMBA bus.
- KSP Keywords
- AMBA bus, H.264 decoder, Level design, Network model, On-Chip Bus, On-Chip Network, Virtual platform, design environment, fast simulation, multimedia applications, simulation time