상세정보
학술대회
An Efficient Data-Aided Initial Frequency Synchronizer for DVB-S2
- 발행일
- 200710
- 출처
- Workshop on Signal Processing Systems (SiPS) 2007, pp.645-650
- 협약과제
- 07MR3600, 21GHz대역 위성방송 전송기술개발, 장대익
- 초록
- This paper presents an efficient initial frequency synchronizer for DVB-S2. An initial frequency offset of the DVB-S2 is around 짹5 MHz, which represents 20% of the symbol rate at 25 Mbaud. To estimate a large initial frequency offset, the algorithm which can provide a large estimation range is required. Through the analysis of the Data-aided (DA) algorithms, we find that the Mengali and Moreli (M&M) algorithm can estimate a large initial frequency offset at low SNR. Based on the algorithm, we propose an efficient initial frequency synchronizer to reduce hardware complexity. The proposed architecture can reduce about 68% multipliers, 55% arctan units and 54% adder/subtractors compared with the direct implementation. The proposed architecture has been thoroughly verified using a FPGA board having the the Xilinx?꽓 Virtex II. ©2007 IEEE.
- KSP 제안 키워드
- DVB-S2, FPGA Board, Hardware complexity, Low SNR, data-aided, frequency offset, symbol rate