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Journal Article
Multi-bit Sigma-Delta Modulator for Low Distortion and High-Speed Operation
- Authors
- Yi-Gyeong Kim, Jong-Kee Kwo
- Issue Date
- 2007-12
- Citation
- ETRI Journal, v.29, no.6, pp.835-837
- ISSN
- 1225-6463
- Publisher
- 한국전자통신연구원 (ETRI)
- Language
- English
- Type
- Journal Article
- Project Code
- 07MB2600, Components/Module technology for Ubiquitous Terminals, Kim Jongdae
- Abstract
- A multi-bit sigma-delta modulator architecture is described for low-distortion performance and a high-speed operation. The proposed architecture uses both a delayed code and a delayed differential code of analog-to-digital converter in the feedback path, thereby suppressing signal components in the integrators and relaxing the timing requirement of the analog-to-digital converter and the scrambler logic. Implemented by a 0.13 μm CMOS process, the sigma-delta modulator achieves high linearity. The measured spurious-free dynamic range is 89.1dB for -6 dBFS input signal.
- KSP Keywords
- Analog to digital converter(ADC), CMOS Process, Feedback Paths(FBP), Input signal, high linearity, high-speed operation, low-distortion, sigma-delta modulator, spurious-free dynamic range(SFDR)