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Journal Article A 0.9-V 60-μW 1-Bit Fourth-Order Delta-Sigma Modulator With 83-dB Dynamic Range
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Authors
Jeong Jin Roh, San Ho Byun, Young Kil Choi, Hyung Dong Roh, Yi-Gyeong Kim, Jong-Kee Kwon
Issue Date
2008-02
Citation
IEEE Journal of Solid-State Circuits, v.43, no.2, pp.361-370
ISSN
0018-9200
Publisher
IEEE
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1109/JSSC.2007.914266
Abstract
A 0.9-V 60-μW delta-sigma modulator is designed using standard CMOS 0.13-μm technology. The modulator achieves 83-dB dynamic range in a signal bandwidth of 20 kHz with a sampling frequency of 2 MHz. The input-feedforward architecture is used to reduce the voltage swing of the integrators, which enables low-power amplifiers. By considering the characteristics of the modulator architecture, low-quiescent operational transconductance amplifiers are designed, which use positive feedback to increase dc gain. The designed modulator shows very high figure of merit among the state-of-the-art sub-1-V modulators. © 2008 IEEE.
KSP Keywords
DC gain, Delta-Sigma Modulator, Figure of Merit(FoM), Fourth-order, Positive Feedback, Sampling frequency, dynamic range, high figure of merit, low power, operational transconductance amplifier(OTA), power amplifiers(PAs)